# Electrical – How does an RF transistor bias work

biasRFtransistors

In many RF applications I have seen transistor circuit that looks something like this:

simulate this circuit – Schematic created using CircuitLab

Now, I understand the role of all the components, but one thing bothers me. The drain voltage is superposition of DC and AC voltages: \$V_{D} = V_{DC} + v_{AC}\$, where \$V_{DC}\$ is obviously 12 V and \$v_{AC}\$ is \$G*v_{In}\$. Given the transistor gain G >> 1, the drain voltage swings about 12V, so its amplitude is definitely higher than 12V. But how can it be if the power source dictates the 12V limit??

With normal transistors and op amps, I would assume that this iduces a saturation. But it's not the case from what I have seen – RF transistors I used are highly linear and harmonic level is reasonably low so no effects of saturation have been observed.

So, how do I get drain voltage higher than power supply voltage?