The problem is, as discussed in Section 5.6.3 of the datasheet, the external source of the RSTn pin must be open-drained as soon as the chip has been reset. If it were directly connected to the GPIO pin, then it would simply require that the pin be configured as a high-impedance input after driving low. However, I suspect that the trigger is complicating things.
In order to initiate a reset, the GPIO pin is configured as an output with a low value. It then holds this value for 2 milliseconds and then is configured to a high-impedance input. I think that the trigger cannot allow an output to float, and so the reset can only be driven high or low.
So I guess my question is this: Is there a modification that I can make to the existing board that can address this issue? If not, what component should I use instead?