MATLAB: HDL Coder Sharing alters wordlength of multiplier

HDL Codermultiplier sharingresourceresource sharingsimulink

I've recognized that my design uses way too much DSP-Slices than it should, so I looked at the generated model in detail and also the corresponding vhdl-files. To my surprise I found that the wordlength of the multipliers was twice (from 32 to 64) as originally specified. This happens regardless of whether the wordlength/datatype is inherited or specified. Why does this happen and is there a way to suppress this behavior?
The input fixed-point data types have the same wordlength and do not change in the generated model or code.

Best Answer

  • In hardware multipliying two inputs of size 'n' and 'm' would result in full precision output of 'n+m'. The result is further truncated with output type as specified in the multiplier block. Is there a way to reduce input word lengths to reduce requirements on size of the multiplier needed to perform the computation?
    For additional assistance, please share a multiplier block model with necessary options set to further diagnose the problem.